Mapping memory

Assembler programming questions
  • http://wiki.kolibrios.org/wiki/SysFn62/ ... 0.BA.D0.B0

    to let users access MMIO, the kernel shoul be compiled with mmio_pci_addr = b:d.f
    (http://websvn.kolibrios.org/filedetails ... Fpci32.inc)
    or you need to map MMIO in your driver?
  • art_zh wrote:http://wiki.kolibrios.org/wiki/SysFn62/ ... 0.BA.D0.B0

    to let users access MMIO, the kernel shoul be compiled with mmio_pci_addr = b:d.f
    (http://websvn.kolibrios.org/filedetails ... Fpci32.inc)
    or you need to map MMIO in your driver?
    All I need is one virtual physical address (range) that is available for 4096 bytes (If I understand it correctly).
    Last edited by hidnplayr on Sun Dec 01, 2013 10:42 pm, edited 1 time in total.
    "Any intelligent fool can make things bigger, more complex, and more violent. It takes a touch of genius -- and a lot of courage -- to move in the opposite direction." Albert Einstein
  • KernelAlloc ?
  • Asper wrote:KernelAlloc ?
    I dont need memory from RAM.
    "Any intelligent fool can make things bigger, more complex, and more violent. It takes a touch of genius -- and a lot of courage -- to move in the opposite direction." Albert Einstein
  • I just need to find a physical address that is still free.
    For example, 0x7f000000 worked on my test machine. But there is no guarantee that it will work on others...
    "Any intelligent fool can make things bigger, more complex, and more violent. It takes a touch of genius -- and a lot of courage -- to move in the opposite direction." Albert Einstein
  • hidnplayr
    You just need to wait for the forum to come Serge - he will most likely answer your question about the memory manager.
    Всем чмоки в этом проекте! Засуньте эти 11 лет себе в жопу!
  • hidnplayr
    the only way to detect the MMIO physical range is to read the device's base address registers (BARs) located in its configspace.
    use bus/pci/pci32.inc functions (also available in userspace via fn62)
  • art_zh wrote:hidnplayr
    the only way to detect the MMIO physical range is to read the device's base address registers (BARs) located in its configspace.
    use bus/pci/pci32.inc functions (also available in userspace via fn62)
    For regular PCI devices this has been filled in by the BIOS yes, but not for PCI-pc card bridges.
    "Any intelligent fool can make things bigger, more complex, and more violent. It takes a touch of genius -- and a lot of courage -- to move in the opposite direction." Albert Einstein
  • Then your driver needs to do the work BIOS does.
    I tryed this for PCIe hotplug, but stepped back - it takes tons of clever tricks with MRRs, northbridge apertures and IRQ allocations.
    Plug-and-restart is much simpler.
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