Is anybody alive in here?

Applications development, KoOS API questions
  • User avatar
    Asper
    Posts 988
    Joined: Fri Jun 27, 2008 3:22 pm

    I'm here, trying to get rid of 'silent play', but have nothing ready yet.
  • User avatar
    hidnplayr Mentor/Kernel Developer
    Posts 1333
    Joined: Fri Jun 30, 2006 9:01 am

    Asper wrote:I'm here, trying to get rid of 'silent play', but have nothing ready yet.
    Assuming you are talking about intel hd audio, as you probably already know, I havent got that laptop anymore I used to debug.
    But I have lots of 'new' hardware, can it be of any help ?
    "Any intelligent fool can make things bigger, more complex, and more violent. It takes a touch of genius -- and a lot of courage -- to move in the opposite direction." Albert Einstein
  • User avatar
    Asper
    Posts 988
    Joined: Fri Jun 27, 2008 3:22 pm

    Yes I'm speaking about HD audio driver. I remember about your laptop, but if you could test the driver on other hardware so why not? More test -> more information about the driver's work on the real hardware -> more stable driver we have.
  • User avatar
    dunkaist Mentor
    Posts 796
    Joined: Mon Oct 19, 2009 10:58 am

    hidnplayr, I got my first job about one month ago. It's full time, so unfortunately I don't have enough time for my projects so far.

    Glad to see your commits, keep going! I am still working on libimg.
  • User avatar
    hidnplayr Mentor/Kernel Developer
    Posts 1333
    Joined: Fri Jun 30, 2006 9:01 am

    I have found the following audio cards in my posession:

    14f1 5045 conexant HDA, (hp laptop)
    10ec 0888 realtek hd audio (onboard)
    realtek alc650 (onboard)
    1039 7018 sis 7018 (onboard)
    111d 7605 IDT hd audio (laptop, onboard)
    intel ac97 (works already)
    via ac97
    trident 4dwave-nx (pci)
    cmi8738 (pci)
    es1373 (pci)
    ct2518 (pci)
    es1370 (pci)
    8086 24c5 intel ac97 (onboard)
    13f6 0111 terratec 5.1 (pci)

    I'm afraid none of these will be of much interest to you
    "Any intelligent fool can make things bigger, more complex, and more violent. It takes a touch of genius -- and a lot of courage -- to move in the opposite direction." Albert Einstein
  • User avatar
    hidnplayr Mentor/Kernel Developer
    Posts 1333
    Joined: Fri Jun 30, 2006 9:01 am

    dunkaist wrote:hidnplayr, I got my first job about one month ago. It's full time, so unfortunately I don't have enough time for my projects so far.

    Glad to see your commits, keep going! I am still working on libimg.
    good to hear that, what are the plans with libimg? I dont suppose you will be adding encoders anytime soon? :)
    "Any intelligent fool can make things bigger, more complex, and more violent. It takes a touch of genius -- and a lot of courage -- to move in the opposite direction." Albert Einstein
  • User avatar
    Asper
    Posts 988
    Joined: Fri Jun 27, 2008 3:22 pm

    hidnplayr wrote:I have found the following audio cards in my posession:

    14f1 5045 conexant HDA, (hp laptop)
    10ec 0888 realtek hd audio (onboard)
    realtek alc650 (onboard)
    1039 7018 sis 7018 (onboard)
    111d 7605 IDT hd audio (laptop, onboard)
    intel ac97 (works already)
    via ac97
    trident 4dwave-nx (pci)
    cmi8738 (pci)
    es1373 (pci)
    ct2518 (pci)
    es1370 (pci)
    8086 24c5 intel ac97 (onboard)
    13f6 0111 terratec 5.1 (pci)
    Wow! I suppose your collection of hardware is as large as the Dex one. :)
    hidnplayr wrote:I'm afraid none of these will be of much interest to you
    Is it a joke? :)
    1,2,5 - intel_hda.obj
    3,6,13 -sound.obj
    4 - sis.obj
    7 - vt8235.obj
    10,12 - in process
  • User avatar
    hidnplayr Mentor/Kernel Developer
    Posts 1333
    Joined: Fri Jun 30, 2006 9:01 am

    Asper wrote: Wow! I suppose your collection of hardware is as large as the Dex one. :)
    It is indeed a collection, specially for KolibriOS ;)
    Looks like I have some testing to do!
    Asper wrote:10,12 - in process
    Are you sure about those numbers?
    AFAIK, es1371=es1373=ct2518 (I must have an es1371 somewhere but I cant find it now)

    es1370 however is an entire different beast I believe
    "Any intelligent fool can make things bigger, more complex, and more violent. It takes a touch of genius -- and a lot of courage -- to move in the opposite direction." Albert Einstein
  • User avatar
    Asper
    Posts 988
    Joined: Fri Jun 27, 2008 3:22 pm

    hidnplayr wrote: It is indeed a collection, specially for KolibriOS ;)
    Looks like I have some testing to do!
    Great! :)
    hidnplayr wrote:Are you sure about those numbers?
    AFAIK, es1371=es1373=ct2518 (I must have an es1371 somewhere but I cant find it now)

    es1370 however is an entire different beast I believe
    Yes you are right ct2518 also has to be supported by that driver. es1370 differs but not too much to be included into separate module.
    Spoiler:VID_ENSONIQ equ 0x1274
    VID_CREATIVE equ 0x1102

    CTRL_ES1370 equ 0x5000
    CTRL_ES1371 equ 0x1371
    CTRL_CT5880B equ 0x5880
    CTRL_EV1938 equ 0x8938

    ; Direct registers
    ES_REG_CONTROL equ 0x00 ; R/W: Interrupt/Chip select control register
    ES_1370_ADC_STOP equ (1 shl 31) ; disable capture buffer transfers
    ES_1370_XCTL1 equ (1 shl 30) ; general purpose output bit
    ES_1373_BYPASS_P1 equ (1 shl 31) ; bypass SRC for PB1
    ES_1373_BYPASS_P2 equ (1 shl 30) ; bypass SRC for PB2
    ES_1373_BYPASS_R equ (1 shl 29) ; bypass SRC for REC
    ES_1373_TEST_BIT equ (1 shl 28) ; should be set to 0 for normal operation
    ES_1373_RECEN_B equ (1 shl 27) ; mix record with playback for I2S/SPDIF out
    ES_1373_SPDIF_THRU equ (1 shl 26) ; 0 = SPDIF thru mode, 1 = SPDIF == dig out
    ES_1371_JOY_ASELM equ (0x03 shl 24) ; mask for above
    ES_1370_PCLKDIVM equ ((0x1fff) shl 16) ; mask for above
    ES_1371_GPIO_OUTM equ (0x0f shl 16) ; mask for above
    ES_MSFMTSEL equ (1 shl 15) ; MPEG serial data format; 0 = SONY, 1 = I2S
    ES_1370_M_SBB equ (1 shl 14) ; clock source for DAC - 0 = clock generator; 1 = MPEG clocks
    ES_1371_SYNC_RES equ (1 shl 14) ; Warm AC97 reset
    ES_1370_WTSRSELM equ (0x03 shl 12) ; mask for above
    ES_1371_ADC_STOP equ (1 shl 13) ; disable CCB transfer capture information
    ES_1371_PWR_INTRM equ (1 shl 12) ; power level change interrupts enable
    ES_1370_DAC_SYNC equ (1 shl 11) ; DAC's are synchronous
    ES_1371_M_CB equ (1 shl 11) ; capture clock source; 0 = AC'97 ADC; 1 = I2S
    ES_CCB_INTRM equ (1 shl 10) ; CCB voice interrupts enable
    ES_1370_M_CB equ (1 shl 9) ; capture clock source; 0 = ADC; 1 = MPEG
    ES_1370_XCTL0 equ (1 shl 8) ; generap purpose output bit
    ES_1371_PDLEVM equ (0x03 shl 8) ; mask for above
    ES_BREQ equ (1 shl 7) ; memory bus request enable
    ES_DAC1_EN equ (1 shl 6) ; DAC1 playback channel enable
    ES_DAC2_EN equ (1 shl 5) ; DAC2 playback channel enable
    ES_ADC_EN equ (1 shl 4) ; ADC capture channel enable
    ES_UART_EN equ (1 shl 3) ; UART enable
    ES_JYSTK_EN equ (1 shl 2) ; Joystick module enable
    ES_1370_CDC_EN equ (1 shl 1) ; Codec interface enable
    ES_1371_XTALCKDIS equ (1 shl 1) ; Xtal clock disable
    ES_1370_SERR_DISABLE equ (1 shl 0) ; PCI serr signal disable
    ES_1371_PCICLKDIS equ (1 shl 0) ; PCI clock disable
    ES_REG_STATUS equ 0x04 ; R/O: Interrupt/Chip select status register
    ES_INTR equ (1 shl 31) ; Interrupt is pending
    ES_1371_ST_AC97_RST equ (1 shl 29) ; CT5880 AC'97 Reset bit
    ES_1373_REAR_BIT27 equ (1 shl 27) ; rear bits: 000 - front, 010 - mirror, 101 - separate
    ES_1373_REAR_BIT26 equ (1 shl 26)
    ES_1373_REAR_BIT24 equ (1 shl 24)
    ES_1373_SPDIF_EN equ (1 shl 18) ; SPDIF enable
    ES_1373_SPDIF_TEST equ (1 shl 17) ; SPDIF test
    ES_1371_TEST equ (1 shl 16) ; test ASIC
    ES_1370_CSTAT equ (1 shl 10) ; CODEC is busy or register write in progress
    ES_1370_CBUSY equ (1 shl 9) ; CODEC is busy
    ES_1370_CWRIP equ (1 shl 8) ; CODEC register write in progress
    ES_1371_SYNC_ERR equ (1 shl 8) ; CODEC synchronization error occurred
    ES_1371_MPWR equ (1 shl 5) ; power level interrupt pending
    ES_MCCB equ (1 shl 4) ; CCB interrupt pending
    ES_UART equ (1 shl 3) ; UART interrupt pending
    ES_DAC1 equ (1 shl 2) ; DAC1 channel interrupt pending
    ES_DAC2 equ (1 shl 1) ; DAC2 channel interrupt pending
    ES_ADC equ (1 shl 0) ; ADC channel interrupt pending
    ES_REG_UART_DATA equ 0x08 ; R/W: UART data register
    ES_REG_UART_STATUS equ 0x09 ; R/O: UART status register
    ES_RXINT equ (1 shl 7) ; RX interrupt occurred
    ES_TXINT equ (1 shl 2) ; TX interrupt occurred
    ES_TXRDY equ (1 shl 1) ; transmitter ready
    ES_RXRDY equ (1 shl 0) ; receiver ready
    ES_REG_UART_CONTROL equ 0x09 ; W/O: UART control register
    ES_RXINTEN equ (1 shl 7) ; RX interrupt enable
    ES_TXINTENM equ (0x03 shl 5) ; mask for above
    ES_CNTRLM equ (0x03 shl 0) ; mask for above
    ES_REG_UART_RES equ 0x0a ; R/W: UART reserver register
    ES_TEST_MODE equ (1 shl 0) ; test mode enabled
    ES_REG_MEM_PAGE equ 0x0c ; R/W: Memory page register
    ES_MEM_PAGEM equ (0x0f shl 0) ; mask for above
    ES_REG_1370_CODEC equ 0x10 ; W/O: Codec write register address
    ES_REG_1371_CODEC equ 0x14 ; W/R: Codec Read/Write register address
    ES_1371_CODEC_RDY equ (1 shl 31) ; codec ready
    ES_1371_CODEC_WIP equ (1 shl 30) ; codec register access in progress
    ES_1371_CODEC_PIRD equ (1 shl 23) ; codec read/write select register

    ES_REG_1371_SMPRATE equ 0x10 ; W/R: Codec rate converter interface register
    ES_1371_SRC_RAM_ADDRM equ (0x7f shl 25) ; mask for above
    ES_1371_SRC_RAM_WE equ (1 shl 24) ; R/W: read/write control for sample rate converter
    ES_1371_SRC_RAM_BUSY equ (1 shl 23) ; R/O: sample rate memory is busy
    ES_1371_SRC_DISABLE equ (1 shl 22) ; sample rate converter disable
    ES_1371_DIS_P1 equ (1 shl 21) ; playback channel 1 accumulator update disable
    ES_1371_DIS_P2 equ (1 shl 20) ; playback channel 1 accumulator update disable
    ES_1371_DIS_R1 equ (1 shl 19) ; capture channel accumulator update disable
    ES_1371_SRC_RAM_DATAM equ (0xffff shl 0) ; mask for above

    ES_REG_1371_LEGACY equ 0x18 ; W/R: Legacy control/status register
    ES_1371_JFAST equ (1 shl 31) ; fast joystick timing
    ES_1371_HIB equ (1 shl 30) ; host interrupt blocking enable
    ES_1371_VSB equ (1 shl 29) ; SB; 0 = addr 0x220xH, 1 = 0x22FxH
    ES_1371_VMPUM equ (0x03 shl 27) ; mask for above
    ES_1371_VCDCM equ (0x03 shl 25) ; mask for above
    ES_1371_FIRQ equ (1 shl 24) ; force an interrupt
    ES_1371_SDMACAP equ (1 shl 23) ; enable event capture for slave DMA controller
    ES_1371_SPICAP equ (1 shl 22) ; enable event capture for slave IRQ controller
    ES_1371_MDMACAP equ (1 shl 21) ; enable event capture for master DMA controller
    ES_1371_MPICAP equ (1 shl 20) ; enable event capture for master IRQ controller
    ES_1371_ADCAP equ (1 shl 19) ; enable event capture for ADLIB register; 0x388xH
    ES_1371_SVCAP equ (1 shl 18) ; enable event capture for SB registers
    ES_1371_CDCCAP equ (1 shl 17) ; enable event capture for CODEC registers
    ES_1371_BACAP equ (1 shl 16) ; enable event capture for SoundScape base address
    ES_1371_WR equ (1 shl 2) ; event capture; 0 = read; 1 = write
    ES_1371_LEGINT equ (1 shl 0) ; interrupt for legacy events; 0 = interrupt did occur

    ES_REG_CHANNEL_STATUS equ 0x1c ; R/W: first 32-bits from S/PDIF channel status block, es1373

    ES_REG_SERIAL equ 0x20 ; R/W: Serial interface control register
    ES_1371_DAC_TEST equ (1 shl 22) ; DAC test mode enable
    ES_P2_END_INCM equ (0x07 shl 19) ; mask for above
    ES_P2_ST_INCM equ (0x07 shl 16) ; mask for above
    ES_R1_LOOP_SEL equ (1 shl 15) ; ADC; 0 - loop mode; 1 = stop mode
    ES_P2_LOOP_SEL equ (1 shl 14) ; DAC2; 0 - loop mode; 1 = stop mode
    ES_P1_LOOP_SEL equ (1 shl 13) ; DAC1; 0 - loop mode; 1 = stop mode
    ES_P2_PAUSE equ (1 shl 12) ; DAC2; 0 - play mode; 1 = pause mode
    ES_P1_PAUSE equ (1 shl 11) ; DAC1; 0 - play mode; 1 = pause mode
    ES_R1_INT_EN equ (1 shl 10) ; ADC interrupt enable
    ES_P2_INT_EN equ (1 shl 9) ; DAC2 interrupt enable
    ES_P1_INT_EN equ (1 shl 8) ; DAC1 interrupt enable
    ES_P1_SCT_RLD equ (1 shl 7) ; force sample counter reload for DAC1
    ES_P2_DAC_SEN equ (1 shl 6) ; when stop mode: 0 - DAC2 play back zeros; 1 = DAC2 play back last sample
    ES_R1_MODEM equ (0x03 shl 4) ; mask for above
    ES_P2_MODEM equ (0x03 shl 2) ; mask for above
    ES_P1_MODEM equ (0x03 shl 0) ; mask for above

    ES_REG_DAC1_COUNT equ 0x24 ; R/W: DAC1 sample count register
    ES_REG_DAC2_COUNT equ 0x28 ; R/W: DAC2 sample count register
    ES_REG_ADC_COUNT equ 0x2c ; R/W: ADC sample count register
    ES_REG_COUNTM equ (0xffff shl 0)

    ES_REG_DAC1_FRAME equ 0x30 ; R/W: PAGE 0x0c; DAC1 frame address
    ES_REG_DAC1_SIZE equ 0x34 ; R/W: PAGE 0x0c; DAC1 frame size
    ES_REG_DAC2_FRAME equ 0x38 ; R/W: PAGE 0x0c; DAC2 frame address
    ES_REG_DAC2_SIZE equ 0x3c ; R/W: PAGE 0x0c; DAC2 frame size
    ES_REG_ADC_FRAME equ 0x30 ; R/W: PAGE 0x0d; ADC frame address
    ES_REG_ADC_SIZE equ 0x34 ; R/W: PAGE 0x0d; ADC frame size
    ES_REG_FCURR_COUNTM equ (0xffff shl 16)
    ES_REG_FSIZEM equ (0xffff shl 0)
    ES_REG_PHANTOM_FRAME equ 0x38 ; R/W: PAGE 0x0d: phantom frame address
    ES_REG_PHANTOM_COUNT equ 0x3c ; R/W: PAGE 0x0d: phantom frame count

    ES_REG_UART_FIFO equ 0x30 ; R/W: PAGE 0x0e; UART FIFO register
    ES_REG_UF_VALID equ (1 shl 8)
    ES_REG_UF_BYTEM equ (0xff shl 0)
    : I like the style of shift left for 8. :)
    Last edited by Asper on Sun Jul 29, 2012 6:41 pm, edited 1 time in total.
  • User avatar
    dunkaist Mentor
    Posts 796
    Joined: Mon Oct 19, 2009 10:58 am

    hidnplayr wrote:good to hear that, what are the plans with libimg?
    They are bilinear scaling and slide show mode (kiv). Btw, we already have two scaling realizations in kolibri: kernel function setting background and zSea plugin, which are gpl and bsd correspondingly. But... I write in asm because it is interesting for me to know how all these things are made inside. I wouldn't write for kolibri without this interest. Therefore I will probably write yet another bicycle scaling function.
    hidnplayr wrote:I dont suppose you will be adding encoders anytime soon?
    There are two encoders (pnm and bmp) already on svn, see r2684, r2685, r2692. Both are some kind of prototype though: just to show, test and develop encode API. So you are right, there will be no encoders from me before proper scaling is done.

    I feel uncomfortable writing posts having no commits (just as last time), but strict-on-topic talks and questions are always encouraged.

    P.S. - I didn't write png and jpeg decoders and suppose developing these encoders will be rather intricate job for me :D
  • User avatar
    Asper
    Posts 988
    Joined: Fri Jun 27, 2008 3:22 pm

    dunkaist
    libimg with scaling and encoders will be the very powerfull library for application development, the best library in asm to work with images as I think. Good luck at your job and development of libimg!
    Last edited by Asper on Sun Jul 29, 2012 7:07 pm, edited 1 time in total.
  • User avatar
    hidnplayr Mentor/Kernel Developer
    Posts 1333
    Joined: Fri Jun 30, 2006 9:01 am

    Asper: the style for shl 8 ?
    dunkaist: good ideas, go for it ;)
    "Any intelligent fool can make things bigger, more complex, and more violent. It takes a touch of genius -- and a lot of courage -- to move in the opposite direction." Albert Einstein
  • User avatar
    Asper
    Posts 988
    Joined: Fri Jun 27, 2008 3:22 pm

    hidnplayr wrote:Asper: the style for shl 8 ?
    Yes I had to use

    Code: Select all

     tag for the code under the spoiler.
  • User avatar
    Leency Designer
    Posts 5751
    Joined: Thu Jan 25, 2007 3:33 pm

    I'm here too.
    Из хаоса в космос
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