LOG: i915 v4.4.15-dbg build Jul 23 2016 13:12:06 PCI device 8086:a144 bus:0 devfn:f8 PCI device 8086:1912 bus:0 devfn:10 PCI device 8086:191f bus:0 devfn:0 <6>SMBIOS 2.8 present. <7>DMI: Gigabyte Technology Co., Ltd. To be filled by O.E.M./H170-HD3-CF, BIOS F4 10/16/2015 <6>[drm] device 8086:1912 <6>[drm] <6>[drm] i915 device info: gen=9, pciid=0x1912 rev=0x06 flags=need_gfx_hws,is_skylake,has_fbc,has_hotplug,has_llc,has_ddi,has_fpga_dbg,<6>[drm] Found SunrisePoint PCH <6>[drm] Memory usable by graphics device = 2048M <6>[drm] GMADR size = 256M <6>[drm] GTT stolen size = 512M <6>[drm] ppgtt mode: 2 <6>[drm] slice total: 1 <6>[drm] subslice total: 3 <6>[drm] subslice per slice: 3 <6>[drm] EU total: 24 <6>[drm] EU per subslice: 8 <6>[drm] has slice power gating: n <6>[drm] has subslice power gating: n <6>[drm] has EU power gating: y <6>[drm] Supports vblank timestamp caching Rev 2 (21.10.2013). <6>[drm] Driver supports precise vblank timestamp query. <6>[drm] Disabling display power well support <6>[drm] Set default to SSC at 120000 kHz <6>[drm] Using VBT from PCI ROM: $VBT SKYLAKE d <6>[drm] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 1 fdi_rx_polarity_inverted 0 <6>[drm] crt_ddc_bus_pin: 2 <6>[drm] DRRS supported mode is static <6>[drm] Found panel mode in BIOS VBT tables: <6>[drm] Modeline 0:"1024x768" 0 65000 1024 1048 1184 1344 768 771 777 806 0x8 0xa <6>[drm] VBT initial LVDS value 300 <6>[drm] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 0, level 255 <6>[drm] Unsupported child device size for SDVO mapping. <6>[drm] DRRS State Enabled:1 <6>[drm] Port B VBT info: DP:0 HDMI:1 DVI:1 EDP:0 CRT:0 <6>[drm] VBT HDMI level shift for port B: 8 <6>[drm] Port C VBT info: DP:0 HDMI:1 DVI:1 EDP:0 CRT:0 <6>[drm] VBT HDMI level shift for port C: 8 <6>[drm] Port D VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0 <6>[drm] VBT HDMI level shift for port D: 8 <6>[drm] Memory reserved for graphics device: 524288K, usable: 523264K <6>[drm] enabling always-on <6>[drm] enabling power well 1 <6>[drm] enabling MISC IO power well <6>[drm] enabling power well 2 <6>[drm] Disabling DC6 <6>[drm] enabling DDI A/E power well <6>[drm] Enabling DDI A/E power well <6>[drm] enabling DDI B power well <6>[drm] Enabling DDI B power well <6>[drm] enabling DDI C power well <6>[drm] Enabling DDI C power well <6>[drm] enabling DDI D power well <6>[drm] irq=10 <6>[drm] Gen9 Plane WM0 latency 2 (2.0 usec) <6>[drm] Gen9 Plane WM1 latency 19 (19.0 usec) <6>[drm] Gen9 Plane WM2 latency 28 (28.0 usec) <6>[drm] Gen9 Plane WM3 latency 32 (32.0 usec) <6>[drm] Gen9 Plane WM4 latency 63 (63.0 usec) <6>[drm] Gen9 Plane WM5 latency 77 (77.0 usec) <6>[drm] Gen9 Plane WM6 latency 83 (83.0 usec) <6>[drm] Gen9 Plane WM7 latency 99 (99.0 usec) <6>[drm] 3 display pipes available. <6>[drm] Current CD clock rate: 675000 kHz <6>[drm] Max CD clock rate: 675000 kHz <6>[drm] Max dotclock rate: 675000 kHz <6>[drm] Adding eDP connector on port A <6>[drm] cur t1_t3 0 t8 0 t9 0 t10 0 t11_t12 0 <6>[drm] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 5000 <6>[drm] panel power up delay 200, power down delay 50, power cycle delay 500 <6>[drm] backlight on delay 1, off delay 200 <6>[drm] registering DPDDC-A bus for <6>[drm] VDD left on by BIOS, adjusting state tracking <6>[drm] dp_aux_ch timeout status 0x7d40001f <6>[drm] dp_aux_ch timeout status 0x7d40001f <6>[drm] dp_aux_ch timeout status 0x7d40001f <6>[drm] dp_aux_ch timeout status 0x7d40001f <6>[drm] failed to retrieve link info, disabling eDP <6>[drm] Turning eDP port A VDD off <6>[drm] PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0000 <6>[drm] Adding DP connector on port D <6>[drm] registering DPDDC-D bus for <6>[drm] [CRTC:21] hw state readout: enabled <6>[drm] [CRTC:25] hw state readout: disabled <6>[drm] [CRTC:29] hw state readout: disabled <6>[drm] DPLL 1 hw state readout: crtc_mask 0x00000001, on 1 <6>[drm] DPLL 2 hw state readout: crtc_mask 0x00000000, on 0 <6>[drm] DPLL 3 hw state readout: crtc_mask 0x00000000, on 0 <6>[drm] [ENCODER:31:TMDS-31] hw state readout: disabled, pipe A <6>[drm] [ENCODER:36:TMDS-36] hw state readout: disabled, pipe A <6>[drm] [ENCODER:38:TMDS-38] hw state readout: enabled, pipe A <6>[drm] [ENCODER:40:DP MST-40] hw state readout: disabled, pipe A <6>[drm] [ENCODER:41:DP MST-41] hw state readout: disabled, pipe B <6>[drm] [ENCODER:42:DP MST-42] hw state readout: disabled, pipe C <6>[drm] [CONNECTOR:32:HDMI-A-1] hw state readout: disabled <6>[drm] [CONNECTOR:37:HDMI-A-2] hw state readout: disabled <6>[drm] [CONNECTOR:39:DP-1] hw state readout: enabled <6>[drm] [CONNECTOR:43:HDMI-A-3] hw state readout: disabled <6>[drm] Set [MODE:1920x1080] for CRTC state 95ce7020 <6>[drm] crtc 21: hwmode: htotal 2080, vtotal 1111, vdisplay 1080 <6>[drm] crtc 21: clock 138499 kHz framedur 16685174 linedur 15018 <6>[drm] flush pipe A (pass 3) <6>[drm] [CRTC:21][setup_hw_state] config 95ce7020 for pipe A <6>[drm] cpu_transcoder: A <6>[drm] pipe bpp: 24, dithering: 0 <6>[drm] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 <6>[drm] dp: 1, lanes: 2, gmch_m: 6454567, gmch_n: 8388608, link_m: 268940, link_n: 524288, tu: 64 <6>[drm] dp: 1, lanes: 2, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 <6>[drm] audio: 0, infoframes: 0 <6>[drm] requested mode: <6>[drm] Modeline 0:"1920x1080" 60 138499 1920 1968 2000 2080 1080 1082 1087 1111 0x40 0x9 <6>[drm] adjusted mode: <6>[drm] Modeline 0:"1920x1080" 60 138499 1920 1968 2000 2080 1080 1082 1087 1111 0x40 0x9 <6>[drm] crtc timings: 138499 1920 1968 2000 2080 1080 1082 1087 1111, type: 0x40 flags: 0x9 <6>[drm] port clock: 270000 <6>[drm] pipe src size: 1024x768 <6>[drm] num_scalers: 2, scaler_users: 0x80000000, scaler_id: 0 <6>[drm] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 <6>[drm] pch pfit: pos: 0x00000000, size: 0x07800438, enabled <6>[drm] ips: 0 <6>[drm] double wide: 0 <6>[drm] ddi_pll_sel: 1; dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0 <6>[drm] planes on this crtc <6>[drm] STANDARD PLANE:18 plane: 0.0 idx: 0 disabled, scaler_id = -1 <6>[drm] CURSOR PLANE:20 plane: 0.1 idx: 1 disabled, scaler_id = -1 <6>[drm] STANDARD PLANE:22 plane: 0.1 idx: 2 disabled, scaler_id = -1 <6>[drm] [CRTC:25][setup_hw_state] config 95ce89a0 for pipe B <6>[drm] cpu_transcoder: B <6>[drm] pipe bpp: 0, dithering: 0 <6>[drm] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 <6>[drm] dp: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 <6>[drm] dp: 0, lanes: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 <6>[drm] audio: 0, infoframes: 0 <6>[drm] requested mode: <6>[drm] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 <6>[drm] adjusted mode: <6>[drm] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 <6>[drm] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 <6>[drm] port clock: 0 <6>[drm] pipe src size: 0x0 <6>[drm] num_scalers: 2, scaler_users: 0x0, scaler_id: 0 <6>[drm] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 <6>[drm] pch pfit: pos: 0x00000000, size: 0x00000000, disabled <6>[drm] ips: 0 <6>[drm] double wide: 0 <6>[drm] ddi_pll_sel: 0; dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0 <6>[drm] planes on this crtc <6>[drm] STANDARD PLANE:23 plane: 1.0 idx: 3 disabled, scaler_id = -1 <6>[drm] CURSOR PLANE:24 plane: 1.2 idx: 4 disabled, scaler_id = -1 <6>[drm] STANDARD PLANE:26 plane: 1.1 idx: 5 disabled, scaler_id = -1 <6>[drm] [CRTC:29][setup_hw_state] config 95cea1c8 for pipe C <6>[drm] cpu_transcoder: C <6>[drm] pipe bpp: 0, dithering: 0 <6>[drm] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 <6>[drm] dp: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 <6>[drm] dp: 0, lanes: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 <6>[drm] audio: 0, infoframes: 0 <6>[drm] requested mode: <6>[drm] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 <6>[drm] adjusted mode: <6>[drm] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 <6>[drm] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 <6>[drm] port clock: 0 <6>[drm] pipe src size: 0x0 <6>[drm] num_scalers: 1, scaler_users: 0x0, scaler_id: 0 <6>[drm] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 <6>[drm] pch pfit: pos: 0x00000000, size: 0x00000000, disabled <6>[drm] ips: 0 <6>[drm] double wide: 0 <6>[drm] ddi_pll_sel: 0; dpll_hw_state: ctrl1: 0x0, cfgcr1: 0x0, cfgcr2: 0x0 <6>[drm] planes on this crtc <6>[drm] STANDARD PLANE:27 plane: 2.0 idx: 6 disabled, scaler_id = -1 <6>[drm] CURSOR PLANE:28 plane: 2.3 idx: 7 disabled, scaler_id = -1 <6>[drm] STANDARD PLANE:30 plane: 2.1 idx: 8 disabled, scaler_id = -1 <6>[drm] pipe A with fb: size=1024x768@32, offset=0, pitch 4096, size 0x300000 <6>[drm] creating preallocated stolen object: stolen_offset=0, gtt_offset=0, size=300000 <6>[drm] offset=0x0, size=3145728 <6>[drm] initial plane fb obj 95cf3740 <6>[drm] 95cf2dd0: FB ID: 45 (1) <6>[drm] reserving preallocated space: 0 + 300000 <6>[drm] clearing unused GTT space: [300000, 7ffff000] <6>[drm] LR context support initialized <6>[drm] render ring pipe control offset: 0x00300000 <6>[drm] Execlists enabled for render ring <6>[drm] Execlists enabled for bsd ring <6>[drm] Execlists enabled for blitter ring <6>[drm] Execlists enabled for video enhancement ring <6>[drm] GuC fw status: fetch NONE, load NONE <6>[drm] Current CD clock rate: 675000 kHz <6>[drm] found possible fb from plane A <6>[drm] pipe B not active or no fb, skipping <6>[drm] pipe C not active or no fb, skipping <6>[drm] checking plane A for BIOS fb <6>[drm] fb not wide enough for plane A (7680 vs 4096) <6>[drm] BIOS fb not suitable for all pipes, not using <6>[drm] [CONNECTOR:32:HDMI-A-1] <6>[drm] [CONNECTOR:32:HDMI-A-1] <6>[drm] enabling always-on <6>[drm] HDMI live status down <6>[drm] [CONNECTOR:32:HDMI-A-1] status updated from 3 to 2 <6>[drm] [CONNECTOR:32:HDMI-A-1] disconnected <6>[drm] [CONNECTOR:37:HDMI-A-2] <6>[drm] [CONNECTOR:37:HDMI-A-2] <6>[drm] enabling always-on <6>[drm] HDMI live status down <6>[drm] [CONNECTOR:37:HDMI-A-2] status updated from 3 to 2 <6>[drm] [CONNECTOR:37:HDMI-A-2] disconnected <6>[drm] [CONNECTOR:39:DP-1] <6>[drm] [CONNECTOR:39:DP-1] <6>[drm] DPCD: 12 0a 82 01 00 03 01 81 00 01 00 00 00 00 00 <6>[drm] Display Port TPS3 support: source yes, sink no <6>[drm] Sink OUI: 000000 <6>[drm] Branch OUI: 006037 <6>[drm] Sink is not MST capable <6>[drm] native defer <6>[drm] native defer <6>[drm] native defer <6>[drm] native defer <6>[drm] native defer <6>[drm] native defer <6>[drm] native defer <6>[drm] native defer <6>[drm] native defer <6>[drm] native defer <6>[drm] native defer <6>[drm] native defer <6>[drm] native defer <6>[drm] native defer <6>[drm] native defer <6>[drm] native defer <6>[drm] native defer <6>[drm] [CONNECTOR:39:DP-1] status updated from 3 to 1 <6>[drm] ELD: no CEA Extension found <6>[drm] [CONNECTOR:39:DP-1] probed modes : <6>[drm] Modeline 47:"1920x1080" 60 138500 1920 1968 2000 2080 1080 1082 1087 1111 0x48 0x9 <6>[drm] Modeline 48:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 <6>[drm] Modeline 49:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6 <6>[drm] Modeline 58:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 <6>[drm] Modeline 50:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 <6>[drm] Modeline 53:"1280x960" 75 129936 1280 1368 1504 1728 960 961 964 1002 0x0 0x6 <6>[drm] Modeline 51:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 <6>[drm] Modeline 52:"1280x720" 75 95681 1280 1352 1488 1696 720 721 724 752 0x0 0x6 <6>[drm] Modeline 59:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 <6>[drm] Modeline 60:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa <6>[drm] Modeline 61:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 <6>[drm] Modeline 54:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 <6>[drm] Modeline 55:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa <6>[drm] Modeline 56:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa <6>[drm] Modeline 57:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 <6>[drm] [CONNECTOR:43:HDMI-A-3] <6>[drm] [CONNECTOR:43:HDMI-A-3] <6>[drm] enabling always-on <6>[drm] GMBUS [i915 gmbus dpd] NAK for addr: 0050 w(1) <6>[drm] GMBUS [i915 gmbus dpd] NAK on first message, retry <6>[drm] GMBUS [i915 gmbus dpd] NAK for addr: 0050 w(1) <6>[drm] drm: skipping non-existent adapter i915 gmbus dpd <6>[drm] [CONNECTOR:43:HDMI-A-3] status updated from 3 to 2 <6>[drm] [CONNECTOR:43:HDMI-A-3] disconnected <6>[drm] <6>[drm] connector 32 enabled? no <6>[drm] connector 37 enabled? no <6>[drm] connector 39 enabled? yes <6>[drm] connector 43 enabled? no <6>[drm] connector HDMI-A-1 not enabled, skipping <6>[drm] connector HDMI-A-2 not enabled, skipping <6>[drm] looking for cmdline mode on connector DP-1 <6>[drm] looking for preferred mode on connector DP-1 0 <6>[drm] connector DP-1 on pipe A [CRTC:21]: 1920x1080 <6>[drm] connector HDMI-A-3 not enabled, skipping <6>[drm] desired mode 1920x1080 set on crtc 21 (0,0) <6>[drm] no BIOS fb, allocating a new one <6>[drm] creating stolen object: size=7e9000 <6>[drm] offset=0x300000, size=8294400 <6>[drm] allocated 1920x1080 fb: 0x00340000, bo 95cf7b00 Info drm_fb_helper_single_fb_probe fb0: inteldrmfb frame buffer device <6>[drm] <6>[drm] RC6 off y_kms <6>[drm] 95cf2dd0: FB ID: 45 (2) <6>[drm] 95cf2dd0: FB ID: 45 (3) <6>[drm] Set [NOFB] for plane state 95cf6a28 <6>[drm] check_connector connector: 95cf0ea8 encode: 95cf08f0 crtc: 95ce6850 r™ÆÏSðþÙæ8ˇù{Eà^<6>[drm] size 300000 stride 1000 <6>[drm] get_framebuffer allocate fb name 1 <6>[drm] 95cf7c28: FB ID: 63 (1) <6>[drm] set mode 1024x768: crtc 21 connector DP-1 monitor: GSM model 55fe serial number 48469 <6>[drm] fb:95cf7c28 1024x768x pitch 4096 format 34325258 <6>[drm] Allocated atomic state 95cfc160 <6>[drm] 95cf2d60: blob ID: 44 (1) <6>[drm] Added [CRTC:21] 95cfc330 state to 95cfc160 <6>[drm] 95cf2dd0: FB ID: 45 (2) <6>[drm] Added [PLANE:18] 95cfc600 state to 95cfc160 <6>[drm] 95cf2d60: blob ID: 44 (2) <6>[drm] Set [MODE:1024x768] for CRTC state 95cfc330 <6>[drm] Link plane state 95cfc600 to [CRTC:21] <6>[drm] 95cf2dd0: FB ID: 45 (3) <6>[drm] 95cf7c28: FB ID: 63 (2) <6>[drm] Set [FB:63] for plane state 95cfc600 <6>[drm] Added [CONNECTOR:39] 95cfc6f8 state to 95cfc160 <6>[drm] Adding all current connectors for [CRTC:21] to 95cfc160 <6>[drm] Link connector state 95cfc6f8 to [NOCRTC] <6>[drm] Link connector state 95cfc6f8 to [CRTC:21] <6>[drm] checking 95cfc160 <6>[drm] [CRTC:21] mode changed <6>[drm] Updating routing for [CONNECTOR:39:DP-1] <6>[drm] [CONNECTOR:39:DP-1] keeps [ENCODER:38:TMDS-38], now on [CRTC:21] <6>[drm] [CRTC:21] needs all connectors, enable: y, active: y <6>[drm] Adding all current connectors for [CRTC:21] to 95cfc160 <6>[drm] State 95cfc160 has 1 connectors for [CRTC:21] <6>[drm] Adding all current connectors for [CRTC:21] to 95cfc160 <6>[drm] [CONNECTOR:39:DP-1] checking for sink bpp constrains <6>[drm] clamping display bpp (was 36) to default limit of 18 <6>[drm] DP link computation with max lane count 2 max bw 270000 pixel clock 65000KHz <6>[drm] DP link bw 06 rate select 00 lane count 1 clock 162000 bpp 18 <6>[drm] DP link bw required 117000 available 129600 <6>[drm] hw max bpp: 36, pipe bpp: 18, dithering: 1 <6>[drm] [CRTC:21][modeset] config 95cfc330 for pipe A <6>[drm] cpu_transcoder: A <6>[drm] pipe bpp: 18, dithering: 1 <6>[drm] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 <6>[drm] dp: 1, lanes: 1, gmch_m: 1893262, gmch_n: 2097152, link_m: 105181, link_n: 262144, tu: 64 <6>[drm] dp: 1, lanes: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 <6>[drm] audio: 0, infoframes: 0 <6>[drm] requested mode: <6>[drm] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa <6>[drm] adjusted mode: <6>[drm] Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa <6>[drm] crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa <6>[drm] port clock: 162000 <6>[drm] pipe src size: 1024x768 <6>[drm] num_scalers: 2, scaler_users: 0x80000000, scaler_id: 0 <6>[drm] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 <6>[drm] pch pfit: pos: 0x00000000, size: 0x00000000, disabled <6>[drm] ips: 0 <6>[drm] double wide: 0 <6>[drm] ddi_pll_sel: 1; dpll_hw_state: ctrl1: 0x3, cfgcr1: 0x0, cfgcr2: 0x0 <6>[drm] planes on this crtc <6>[drm] STANDARD PLANE:18 plane: 0.0 idx: 0 enabled<6>[drm] FB:45, fb = 1024x768 format = 0x34325258<6>[drm] scaler:-1 src (0, 0) 0x0 dst (0, 0) 0x0 <6>[drm] CURSOR PLANE:20 plane: 0.1 idx: 1 disabled, scaler_id = -1 <6>[drm] STANDARD PLANE:22 plane: 0.1 idx: 2 disabled, scaler_id = -1 <6>[drm] Updating scaler for [PLANE:18] scaler_user index 0.0 <6>[drm] [CRTC:21] has [PLANE:18] with fb 63 <6>[drm] [PLANE:18] visible 1 -> 1, off 1, on 1, ms 1 <6>[drm] CRTC:21 allocated DPLL 1 <6>[drm] using DPLL 1 for pipe A <6>[drm] Updating scaler for [CRTC:21] scaler_user index 0.31 <6>[drm] scaler_user index 0.31: Staged freeing scaler id 0 scaler_users = 0x0 <6>[drm] commiting 95cfc160 <6>[drm] Disabling FBC: disabled per chip default <6>[drm] disabling pipe A <6>[drm] disable DPLL 1 (active 1, on? 1) for crtc 21 <6>[drm] disabling DPLL 1 <6>[drm] crtc 21: hwmode: htotal 1344, vtotal 806, vdisplay 768 <6>[drm] crtc 21: clock 65000 kHz framedur 16665600 linedur 20676 <6>[drm] enable DPLL 1 (active 0, on? 0) for crtc 21 <6>[drm] enabling DPLL 1 <6>[drm] Using signal levels 00000000 <6>[drm] Using vswing level 0 <6>[drm] Using pre-emphasis level 0 <6>[drm] clock recovery OK <6>[drm] Channel EQ done. DP Training successful <6>[drm] for crtc_state = 95cfc330 <6>[drm] flush pipe A (pass 3) <6>[drm] enabling pipe A <6>[drm] [CONNECTOR:39:DP-1] <6>[drm] [ENCODER:31:TMDS-31] <6>[drm] [ENCODER:36:TMDS-36] <6>[drm] [ENCODER:38:TMDS-38] <6>[drm] [ENCODER:40:DP MST-40] <6>[drm] [ENCODER:41:DP MST-41] <6>[drm] [ENCODER:42:DP MST-42] <6>[drm] 95cf2d60: blob ID: 44 (1) <6>[drm] [CRTC:21] <6>[drm] DPLL 1 <6>[drm] DPLL 2 <6>[drm] DPLL 3 <6>[drm] Clearing atomic state 95cfc160 <6>[drm] 95cf2dd0: FB ID: 45 (2) <6>[drm] Freeing atomic state 95cfc160 <6>[drm] 95cf7c28: FB ID: 63 (3) <6>[drm] 95cf2dd0: FB ID: 45 (1) <6>[drm] kolibri framebuffer 95cf7cb8 <6>[drm] new mode 1024 x 768 pitch 4096 <6>[drm] 95cf7c28: FB ID: 63 (4) leave init_display_kms Set DISPLAY handler